Intel's Alleged 18A Chip Manufacturing Struggles Put Panther Lake Launch At Risk

By Zak Killian

Intel's Alleged 18A Chip Manufacturing Struggles Put Panther Lake Launch At Risk

A Reuters report yesterday claims that Intel is struggling with poor yields on its next-generation 18A manufacturing process, and the state of the manufacturing chain is bad enough, allegedly, that it might jeopardize the launch of Panther Lake. The report cites anonymous sources who say yields on 18A wafers are poor, with "only a small percentage" of Panther Lake chips suitable for sale to customers.

This story has a problem, though: Intel already told us what its 18A defect rates look like, and that number doesn't match the picture Reuters is painting. Back in September of 2024, Intel publicly stated that its 18A process was yielding less than 0.4 defects per square centimeter. When plugged into standard yield models, that number actually looks pretty healthy, especially for small chips like those involved in Panther Lake.

For example, what is thought to be Panther Lake's largest die, estimated to be around 115 mm², still clears a ~64% theoretical yield rate at that defect density. We ran the numbers back when some outlets were doom-and-glooming about the news (also originating with anonymous sources speaking to Reuters) that Broadcom was supposedly unsatisfied with 18A yields; other outlets including TechPowerUp! ran similar numbers at the time, and while yields vary by design, the math just doesn't support the idea that chip fabrication yields are a catastrophic failure.

So what's going on? The most plausible theory is not that Intel is lying about defect density; it legally can't afford to do so. That >0.4 d0 figure was disclosed to investors, and if it were false, the SEC and a swarm of lawsuits would be the least of Intel's worries. We think that, assuming the Reuters story is broadly true -- that Panther Lake is troubled -- it's more likely that the problem is packaging. Panther Lake uses not just the bleeding-edge 18A node but also PowerVia backside power delivery, Foveros stacking, and EMIB interconnects -- an extremely complex combination that could be bottlenecking assembly yield rates even if the bare dies are good.

Reuters' report appears to conflate wafer yields with full product yields, and while that makes for a juicy headline, it muddies the technical picture. It's absolutely possible that Panther Lake is having trouble ramping, but right now, there's no compelling reason to think 18A lithography is the reason why. Until we see either an official walkback from Intel or a second, independent source backing up Reuters' numbers, it's best to take this one with an interposer-sized grain of salt.

Still, bad yields are bad yields, whatever the reason. If Intel is having trouble packaging Panther Lake processors, that doesn't bode well for the company's financial prospects. Reuters also reports that Intel's CFO David Zinsner disputed the earlier claims of poor yields on 18A, and that he's "optimistic about improvement by year-end." For our part, we're hopeful that Intel gets its issues figured out, because we need competition in the marketplace.

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